Semiconductor devices or modules are often tested using automatic test equipment (ATE). Generally, the tester includes a computer system that coordinates and runs the tests, and a testing apparatus. Typically testers are costly, bulky machines consuming vast amounts of power, taking large amounts of space on a test floor, requiring expensive cooling techniques and using restrictive proprietary backplane architectures which are costly to develop and prevent instruments from other manufacturers being employed. Further current testers have limited signal integrity due to the electrical length and parasitic capacitances introduced by cabling between the test instruments and the device under test (DUT). Further testers capable of parallel testing are now available but are extremely costly, and at present no tester exists that is capable of testing high speed date communication devices with programmable jitter injection at date-rates above 5 gigabits per second.
The invention described herein is a semiconductor integrated circuit/module tester which can address all of these issues. The distributed stimulus for RF automatic test applications reduces the cost of test and enables greater test flexibility and provides an economical way to test devices with multiple RF ports perform parallel device testing. The unified testhead for automatic test applications overcomes the problem of testers being so bulky and costly by building the entire tester into one assembly using a standard backplane architecture such as PXI, VXI, or VME so that ofd shelf modules may be used and the entire tester can mate directly it a prober—handler effectively taking zero tester floor space. The problem of being limited to proprietary backplanes in the tester is overcome by the reverse card backplane for automatic test applications leveraging existing backplane technology such as PXI, VXI, or VME while still providing both front and back access to test boards/modules enabling better signal integrity and shorter electrical lengths when connecting to the device under test (DUT). The problem of RF cable lengths between the test instrumentation and the DUT is further overcome by the direct coaxial interface for automatic test applications and provides a further way of shortening the electrical path length thus improving signal quality when connecting to the device under test (DUT). Likewise for signal paths not using coaxial connectors the cable-free interface for automatic test applications provides another way of shortening the electrical, optical or magnetic path to improve signal quality when connecting to the device under test (DUT). The problem of testers either being bulky or not flexible is further overcome by the micromachine switch matrix for automatic test applications provides greater flexibility in tester configuration without degrading signal integrity, The problem of parallel test being costly is overcome by the device specific module for RF automatic test applications makes it possible to perform low cost parallel testing of multiple device families. The problem of not being able to test high speed date communications devices at date rates above 5 gigabits per second with programmable jitter and levels is overcome by the high speed date communications test apparatus. The problem of power consumption and high cooling cost is overcome by using a flexible open architecture with power-efficient circuitry and reduced electrical losses due to the reverse card backplane, direct coaxial interface and cable free interface requiring less power to achieve comparable signal integrity and a scalable architecture making it only necessary to populate the tester to the level required.